Post event slides available here!
We look forward to updating the broader technical community on the latest progress of RISC-V. Mark Himelstein, the CTO of RISC-V will present on the latest progress various technical tasks groups have made. In addition, Lattice Semiconductor will present on their recently announced RISC-V offerings, including their design tools and security examples using RISC-V in Lattice FPGAs.
10-10:10 Upcoming RISC-V community event updates - Ted Marena
10:10-10:40 RISC-V technical progress - Mark Himelstein
10:40-11:00 Lattice Semicondutor RISC-V design tools & examples - Roger Do, Eric Sivertson
RISC-V
CTO
Western Digital
Senior Director RISC-V Ecosystem, ML Business Development
Lattice Semiconductor
VP Security Business
Lattice Semiconductor
Senior Manager for Design Tools
Before RISC-V international Mark Himelstein was the President of Heavenstone, Inc. which concentrated on Strategic, Management, and Technology Consulting providing hardware and software product architecture, analysis, mentoring and interim management. Previously, Mark started Graphite Systems, Inc (acquired by EMC) where he was the VP of Engineering and CTO developing large Analytics Appliances using highly integrated FLASH memory. Prior to Graphite, Mark held positions as the CTO of Quantum Corp, Vice President of Solaris development engineering at Sun Microsystems and other technical management roles at Apple, Infoblox, and MIPS.
Mark has a bachelors degree in Computer Science and Math from Wilkes University in Pennsylvania and a masters degree in Computer Science from University of California Davis/Livermore. In addition to publishing numerous technical papers and holding many patents, he is the author of the book “100 Questions to Ask Your Software Organization”.
