We use cookies to ensure that we give you the best experience on our website. By continuing your visit on the website, you consent to the use of the cookies. If you want to find out more about the cookies we use, you can access our Privacy Policy.
Combining large numbers of RISC-V Vector processors to solve a common machine learning problem such as image recognition is a function vector processors are well suited for. In this meetup, presenters will describe how the power of the RISC-V Vector processor tackles this problem. They will also offers a solution to the memory bandwidth bottleneck common in large multiprocessor arrays.
Multi-disciplinary, business expert in embedded systems, end-to-end cybersecurity. Adept at introducing advanced technologies to benefit customers & partners. Successful track records of creating economic value for large OEM, semiconductor, and enterprise customers. I have built startups and worked for F100 companies. Those experiences trained me to see the big picture, as well as being customer-centric, resourceful, collaborative, analytical and process oriented.
John Min
Andes Technology Corp.
John Min is the Director of Field Applications Engineering for North America at Andes. John has been working for processor companies in the Silicon Valley for past 30 years with companies including at Hewlett Packard, LG, ARC, MIPS and SiFive. He brings wealth of information on Architecture of processors, IP and high performance processing. John specializes in balancing the Power, Area and Performance to yield optimized SoC. John is a graduate of University of Southern California with degrees in Electrical Engineering and Biomedical Engineering.
