UET's first RISC-V based Microprocessor System

Karachi RISC-V Group
Sat, Jun 4, 9:00 PM (PKT)

24 RSVP'ed

In this webinar, there will talk on the fastest-growing RISC-V ecosystem, globally and within the premises of the University of Engineering and Technology Lahore. The demonstration of SoC design with RISC-V CPU - from scratch to chip fabrication - will be given. The target audience is undergraduate students from all over Pakistan.

About this event

A team of undergraduate students under the supervision of faculty members of the Electrical Engineering department of the University of Engineering and Technology, Lahore, has designed the RISC-V-based microprocessor system integrating it with various peripherals to make it a System on Chip (SoC). The design has also been selected for the tape-out by Efabless in the open-source MPW-5 shuttle program which is sponsored by Google. The fabrication of the chip will be carried out under 130nm process technology by SkyWater foundries.

In the context of this achievement, this webinar was arranged to encourage new aspirants to join the fastest growing RISC-V ecosystem and open-source silicon. Two of the undergraduate team members: Abdul Wadood and Junaid Amjad,  will discuss the following aspects in this webinar:
1. RISC-V: Why and how it is the fastest-growing ISA.

2. Demonstration of RISC-V Microprocessor system design.

3. Open source design, verification, and chip fabrication tools.

3. Mentorships, Internships, and Career opportunities for upcoming aspirants.

Speakers

Mentors


Organizer

  • Zeeshan Rafique

    Zeeshan Rafique

    MERL

    Research Associate; Lead Organizer

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