The HaDes-V In-Person Workshop is the hands-on hardware finale of the RISC-V Community Challenge, where modular 32-bit RISC-V microcontroller designs come to life in a supervised setting. Based on HaDes-V’s open, step-by-step “jigsaw puzzle” methodology, the workshop brings together processor design, practical FPGA implementation, and direct exchange with the community.

The workshop is open to anyone interested in HaDes-V, RISC-V processor design, and hands-on FPGA-based learning. Participants can attend to learn more about the design flow, work on their implementations, exchange ideas with the community, and see HaDes-V systems running on real hardware.

For participants aiming to complete the Community Challenge with the Gold medal, a Persephone score of at least 50 points is required before attending the workshop. These participants are expected to bring a synthesized bitstream prepared in advance. FPGA boards will be provided on site to test and validate the generated bitstreams.