The HaDes-V In-Person Workshop was held in Bologna, Italy within the RISC-V Summit Europe on June 8, 2026. The presentations presented here are from students who completed the final hand-on stage of the Community Challenge.
In the hands-on hardware finale of the RISC-V Community Challenge, where modular 32-bit RISC-V microcontroller designs come to life in a supervised setting. Based on HaDes-V’s open, step-by-step “jigsaw puzzle” methodology, the workshop brings together processor design, practical FPGA implementation, and direct exchange with the community.
Mymensingh Engineering College
Undergraduate Student, Department of EEE
RTL Design and Verification Engineer
North Carolina State University
Master's Student in Computer Engineering
Graz University of Technology
Assistant Professor | RISC-V Advocate
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