The development of AI computing has reached a critical inflection point. Large-language models (LLMs) attract tremendous attention recently and require huge computation for AI model training and inference. In the AI era, IC design now faces tremendous challenges. It’s more difficult to continuously shrink semiconductor process to meet the targets on performance, power, area, and cost. Huge computing requirements led to high performance, bandwidth, and energy efficiency. Complex IC designs also increase the design costs and demands on highly skilled talents.
At the same time, AI also enables new opportunities. AI can create new functions in IC products and become crucial tools to increase the design efficiency of the IC industry. Meanwhile, open source processor architectures can provide powerful and flexible building blocks to realize complex AI computing architecture. These together have brought revolutionary new opportunities for the IC industry.
On October 12th, join “2023 RISC-V Taipei Day” hosted by RISC-V Taiwan Alliance (RVTA). The forum will explore how the RISC-V open source processor architecture can empower complex IC systems and AI computing architectures in the AI era.
Taiwan IoT Technology and Industry Association, TwIoTA
Chairman
Andes Technology
Chairman and CEO
Qualcomm
Senior Director of Technical Standards
RISC-V International
CEO
VRULL
Founder and Chief Technologist
Tenstorrent
Chief CPU Architect and Senior Fellow Architecture
Andes Technology
President and CTO
Skymizer
CMO & EVP
VRULL
Founder and Chief Technologist
Tenstorrent
Chief CPU Architect and Senior Fellow Architecture
Andes Technology
President and CTO
Skymizer
Chairman of the Board
Synopsys
Vice President
UMC
Associate Vice President
Department of Computer Science, National Yang Ming Chiao Tung University
Associate Dean / Professor
Thursday, October 12, 2023
5:00 AM – 9:00 AM UTC
5:00 AM | Welcome and Registration |
5:30 AM | Opening Keynote |
5:50 AM | Welcome Remark |
5:55 AM | Group Photo |
6:00 AM | Keynote |
6:05 AM | Keynote |
6:10 AM | Bridging the Divide: Unifying RISC-V Through Binary Translation |
6:25 AM | Scalable RISC-V For Digital Transformation |
6:40 AM | Extending RISC-V Intelligence from Cloud to Edge |
7:00 AM | Trends in AI & Automotive: Personalization, Privacy, Data Protection, and LLM on RISC-V |
7:15 AM | Break |
7:35 AM | Panel Discussion |
8:45 AM | Closing and Networking |
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