East Asia RISC-V Sync-up Call (东亚时区双周会·第125次)

Apr 30, 7:00 – 8:00 AM (UTC)

RISC-V in China

About this event

Note !!! Communicate in Chinese video and voice. 

The expected purpose of establishing a biweekly synchronization mechanism:

Help partners in East Asia and Australia time zones communicate with each other about progress and needs.

Communicate during working hours.

Speakers

  • Yunxiang Luo

    PLCT lab, ISCAS

    Testing Director

  • Junqiang Wang

    kubuds

    openEuler RISC-V sig maintainer

  • Mingzhu Yan

    PLCT lab, iscas

    Sail Engineer

  • Xuchang Zhu

    PLCT lab, ISCAS

    software engineer

  • Yanling Yang

    PLCT lab, iscas

    Developer Relationship

  • Jing Xi

    PLCT Lab, ISCAS

    Ruyisdk Product Manager

  • Jiawei Chen

    PLCT lab, ISCAS

    GNU engineer

  • Chunyu Liao

    ISCAS

    Compiler Engineer

  • Yongtai Li

    iscas

    Compiler Engineer

  • Songsong Zhang

    PLCT lab, iscas

    Systems Developer

Moderators

  • Yanling Yang

    PLCT lab, iscas

    Developer Relationship

  • Yunxiang Luo

    PLCT lab, ISCAS

    Testing Director

Hosts

  • Wei Wu

    KUBUDS

    Co-Founder & VP

  • Ji Qiu

    Institute of Software, Chinese Academy of Sciences.

  • Wei Fu

    Redhat

    Principal Software Engineer & RISC-V Ambassador

Organizer

  • Wei Wu

    KUBUDS

    Project Director of PLCT Lab

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