Sep 24, 2:00 – 3:00 PM (UTC)
As AI is transforming computing, RISC-V is in turn revolutionizing AI development by providing a flexible and open AI native Instruction Set Architecture (ISA) that seamlessly integrates software and hardware. From low-power MCU vision recognition to high-performance large language models (LLMs), RISC-V is the common language for the development of AI systems that enables optimized system design with enhanced performance and efficiency.
The RISC-V software-centric approach to AI not only drives innovative computing capabilities but also strengthens the business case for bringing new AI solutions to market. With a thriving ecosystem of members dedicated to advancing technologies and expertise, RISC-V is your key to unlocking success in AI.
In this webinar we will explore RISC-V as an AI native ISA, the technologies and possibilities made real by our ecosystem of member organizations, and the software enablement being undertaken through the RISE project to make RISC-V the logical choice for AI development.
Principal Engineer
RISC-V International
CEO
Microchip Technology
Principal Embedded Linux Engineer
Rivos
Software Engineering Lead
Wednesday, September 24, 2025
2:00 PM – 3:00 PM (UTC)
2:00 PM | RISC-V Developer Updates - Amber Huffman |
2:05 PM | RISC-V International Remarks - Andrea Gallo |
2:15 PM | Yocto Progress - Valentina Fernandez Alanis |
2:25 PM | Deep Dive on AI/ML Plans - Ludovic Henry |
2:45 PM | Q&A |
Principal Engineer
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