RISC-V Technical Session | Code Size Reduction by Advanced Near Addressing Modes

Jun 18, 2:00 – 3:00 PM (UTC)

RISC-V Synergy (Forums, Technical Talks and Webinars)

About this event

Code size reduction by advanced near addressing modes proposes new near-addressing-mode variants for the RISC-V ISA that let real-time control software reach distant global variables in a single instruction instead of two, cutting code size and improving performance on embedded workloads.


Paper: https://arxiv.org/abs/2605.25602

Speaker

  • Kajetan Nürnberger

    Infineon

    Automotive Compute Engineer

Host

  • Rafael Sene

    RISC-V International

    Technical Program Manager

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