RISC-V Technical Session: Digging for Documentation - A Tale of Reverse Engineering

RISC-V Synergy (Forums, Technical Talks and Webinars)

Jun 20, 2:00 – 3:15 PM

62 RSVPs

About this event

Modern hardware platforms are based on complex SoC designs and are going even beyond. RISC-V application processors are no different in that regard. When working on the lowest layers of software, i.e., firmware and operating systems, the many small details of a design need to be well understood in order to fit into existing abstractions, derive new ones, figure out where to split responsibilities, and potentially feed back new concepts into designs again.

Although this might sound like a straightforward process, it is anything but. Software engineers often run into surprises and open questions, so we need to know how to deal with challenges and find our way through a deep sea of missing documentation, note down our approaches and results, and finally share them with the wider community. In this talk, we summarize previous and current issues and experiences with contemporary RISC-V SoCs and discuss ideas and strategies to address these challenges in the future.


  • Daniel Maslowski


    Software Engineer


  • Rafael Sene

    RISC-V International

    Technical Program Manager

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